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Ansys and Synopsys announce partnership to facilitate design optimisation

Simulation software provider Ansys has announced a partnership with electronic design automation (EDA) specialist, Synopsys, to integrate ANSYS’ power integrity and reliability signoff technologies with Synopsys’ physical implementation solution, part of its digital design platform.

This new integrated solution is designed to enable mutual users of both software packages to apply power integrity and reliability signoff technologies earlier in the design flow. This should help users to reduce costs and deliver new products faster than previously possible.

The integration of ANSYS’ platform for chip power and reliability signoff, ANSYS RedHawk, with Synopsys’ best-in-class place-and-route solutions, Synopsys IC Compiler II, will provide users earlier signoff accuracy within the Synopsys design environment.

‘This partnership is a continued step in Synopsys’ strategy to bring more physical and signoff technologies earlier in the design flow within our Synopsys Digital Design Platform,’ said Sassine Ghazi, senior vice president and co-general manager, Design Group at Synopsys. ‘Partnering with ANSYS enables Synopsys to quickly deliver a reliability and thermal-driven design flow that is critical for designing the next generation of semiconductors.’

Synopsys and ANSYS will also provide a feedback loop between the two standard solutions, Synopsys PrimeTime and ANSYS RedHawk. Voltage-aware timing analysis can be performed rapidly to avoid additional guard-banding and design margining. 

‘As the industry moves to more and more complex chips, signoff-driven rail analysis needs to be available sooner in the physical design flow just like timing and design-rule checking,’ said John Lee, general manager at ANSYS. ‘We believe partnering with Synopsys to bring our signoff technology into the Synopsys In-Design approach is the right way to accomplish this objective.’

‘TSMC collaborates with our EDA partners on silicon design solutions to enable our customers to achieve competitive performance, power and area for their next generation electronic products,’ said Suk Lee, TSMC senior director, Design Infrastructure Marketing Division. ‘This industry collaboration between Synopsys and ANSYS provides an opportunity for them to take the collaboration a step further by enabling reliability and thermal-driven physical design built on the industry’s popular physical implementation and signoff solutions.’

‘ARM has been a long-time user of both Synopsys and ANSYS technologies, which have helped in the development of some of the most sophisticated CPU cores available in the market,’ said Hobson Bullman, vice president and general manager, TSG, ARM. ‘This announced partnership will enable our semiconductor partners to optimize our IP within their SoC designs earlier in the flow allowing more time to focus on reliable, robust and energy efficient designs.’


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