AMD and Pathscale join OpenACC while Nvidia strengthens ties to IBM Power systems
The OpenACC standards group has announced that Advanced Micro Devices (AMD) and PathScale, have joined the organisation, aligning with 18 other members and supporters to drive the development of applications for accelerator-enabled supercomputers, clusters and other high performance computing (HPC) systems.
Greg Stoner, senior director of Developer Technology, Professional Graphics, AMD, and newly appointed member of the OpenACC board of directors, said: ‘The HPC community is driving the need for rich heterogeneous computing solutions to better meet customer performance and power needs. With this transition there is a strong need for a rich, simplified programing model to support new heterogeneous application development and pull in legacy C/C++/Fortran applications.’
OpenACC provides an efficient and performance-portable path for developing massively parallel programs across a wide range of accelerators, including GPUs, many core coprocessors and multi-core CPUs.
By joining the OpenACC standards group, AMD and PathScale bring their considerable expertise in high performance computing technology.The OpenACC standard helps programmers take full advantage of AMD’s high-performance Accelerated Processing Units (APUs).
Stoner commented: ‘OpenACC 2.0 via its single source directives-based programming model puts in place a solid foundation to drive key benefits of a heterogeneous hardware platform. AMD is looking forward to working with the OpenACC organisation to help it to continue to evolve this important programming standard.’
Nvidia, who are already involved with the OpenACC standards group, announced the new Tesla K80 earlier this week but this latest announcement focuses on their commitment to IBM’s Power server range of solutions.
Nvidia announced that it is developing an enhanced version of the PGI optimising compilers which will allow developers to develop new applications quickly or run Linux x86-based GPU-accelerated applications on IBM Power CPU systems with minimal effort.
The PGI optimising Fortran, C and C++ compilers for Power will provide a user interface, language features, parallel programming features and optimisation capabilities that are identical to those available on PGI Linux x86 compilers.
The Power8 CPU is a massively multi-threaded processor, featuring 12 cores each capable of handling eight hardware threads simultaneously. Originally positioned for big data and cloud server applications, the Power8 architecture is generating demand from HPC customers given its many performance-oriented features, such as a high-bandwidth CAPI port (Coherent Accelerator Processor Interface) and future support for the NVLink high-speed GPU interconnect.
Douglas Miles, director of PGI Compilers and Tools at Nvidia, said: ‘Our goal is to let HPC developers recompile and run their applications on all major CPU and GPU-accelerated platforms with uniformly high performance using a common source code base. We expect most GPU-accelerated x86 applications currently built with PGI compilers will port to GPU-accelerated Power systems with a simple re-compile.’