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sureCore-led consortium wins £6.5M Innovate UK grant

Innovate UK has awarded a grant of £6.5 million to a seven-member consortium led by sureCore with a remit to jointly develop advanced cryogenic semiconductor IP. 

This will dramatically accelerate the growth of the Quantum Computing (QC) industry by reducing the constraints associated with interconnects thus enabling efficient qubit/system scaling. 

Paul Wells, sureCore’s CEO, said: ‘We are proud to lead this project. It is vital to the success of this project that the Cryo-CMOS produces as little heat as possible. Heat comes from the power usage in the chip and we have perfected several ways to cut power consumption in the memory components of chips by up to 50 per cent. As these QCs will be doing intense computations, there will be huge demand for memory so the savings in power and hence heat will be critical to the operational success of the cryo control chips.’ 

The architecture of quantum computers combined with specialist algorithms have the power to transform computing efficiency to address problems in disciplines spanning fundamental science, pharmaceuticals, finance, logistics and AI.

Most quantum computing platforms utilise qubits or components that operate at cryogenic temperatures. The key challenge for these platforms is the lack of availability of suitable control circuitry capable of operating at the cryogenic temperatures needed to manage qubits operation. Currently the control circuitry is located remotely from the qubits and connected by expensive and bulky cabling in order to avoid the temperature extremes needed by the qubits. The amount of cabling required for all the qubits presents a fundamental barrier to QC scaling aside from the inherent latency impact. 

Matthew Hutchins, CPO and co-founder at SEEQC, said: ‘Cryogenic logic is at the core of SEEQC’s unique quantum computing platform. This project provides an exciting opportunity to incorporate Cryo-CMOS into our chip-based, all-digital, Single Flux Quantum (SFQ) quantum architecture that can operate at the same temperatures as qubits and provides an advantageous interface for Cryo-CMOS. We look forward to working with the world-leading teams in this consortium to realise this goal.’

Matt Martin, director of engineering at Oxford Instruments NanoScience, said: ‘Oxford Instruments is excited to be supplying its leading ultra-low temperature environmental know-how to support the Consortium's chip characterisation requirements for the Cryo-CMOS IP. This is an important step in the commercial scale-up of quantum computing and the collaboration that needs to happen to secure ongoing UK quantum innovation and leadership.’

The obvious solution is to co-locate the control electronics with the qubits in the cryostat but this means that both must be kept at ultra-low temperatures; in some implementations down to near absolute zero. However, not only is space extremely limited in the cryostat, necessitating the miniaturisation of the control circuity, but the modern semiconductors that make up these chips are only qualified to work down to -40° C. As the temperature is reduced close to absolute zero, the operating characteristics of the transistors change markedly. The aim of this project is to essentially understand and model this change in behaviour and then design a portfolio of CryoCMOS IP to enable the creation of custom chips that can interface to the qubits at cryogenic temperatures and support controller functionality.

Professor Asen Asenov, CEO, said ‘SemiWise is delighted to play a key role in this project, delivering the cryogenic version of the foundry PDK and enabling the SRAM and, indeed, general circuit design at cryogenic temperatures. We believe that this will deliver a significant competitive advantage to the rest of the consortium partners.’

A number of leading international technology companies are working on this for their own proprietary use. The UK has many smaller and start-up companies working in or associated with QC that would benefit enormously if a suite of CryoCMOS IP was available to license in much the same way as standard semiconductor IP licensing models work. 

The consortium consists of the complete ecosystem of companies to provide the core competencies required to rapidly develop this cryo-tolerant IP. This would then be available under license for companies to create their own Cryo-CMOS chip solutions using it, turbo charging them with a competitive edge in the world of Quantum Computing. 

Victor Moroz, Synopsys fellow, said ‘As a world-leading provider of Electronic Design Automation (EDA) solutions, Synopsys is committed to enabling our customers to explore and optimise the Cryo-CMOS circuits which will be a key facilitator for a wide-range of quantum technologies. Our Sentaurus TCAD (Technology Computer Aided Design) framework and TCAD to SPICE tools will enable design technology co-optimisation for Cryo-CMOS so that optimal performance-power-area-yield can be achieved in this new application area. We are excited to work with the diverse consortium of industrial and academic experts assembled in this project and feed the learnings into our existing toolchains so that they can be effectively utilised by our customers and partners.’

The first step is accurately modelling how transistors work at these temperatures. This is being done by SemiWise and the QC research group at the University of Glasgow. Synopsys uses the data generated to refine its TCAD tools. A combination of measurements and simulation data will be used by SemiWise to re-centre the foundry PDK for cryogenic temperatures and to enable the cryogenic circuit design. As memory plays a key role in the electronics, this aspect is handled by sureCore, which is leading the project and whose expertise at keeping chip power consumption low is vital to ensure that waste heat is kept to a minimum so it does not heat the chamber. Chamber expertise is provided by Oxford Instruments which manufactures cryogenic systems. Lastly, Universal Quantum and SEEQC represent end user needs and will determine what IP blocks the project will need to create for the Cryo-CMOS chips. Test chips will be characterised at the cryo temperatures to further refine and validate the models and IP. 

There are a large number of QC companies starting up in the UK. This project will help to make cryo-IP available to all of them so that they will be fast-tracked in the race to provide QC solutions enabling the UK to be seen as a centre of competence for QC. By working as a team, the project expects to be able to achieve results in less than three years rather than the many years it would take working as individuals.


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HPC, Quantum Computing

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