Researchers hope to unlock the secrets of graphene using HPC

Researchers at the University of Illinois at Urbana-Champaign are using the Blue Waters supercomputer to research the potential applications of graphene - including nanoscale electronics and electrical DNA sequencing.

Professor Jerry Bernholc and his colleagues at North Carolina State University are using the supercomputer to explore the use of graphene in the development of transistors that are much smaller than the silicon based transistors available today.

‘We're looking at what's beyond Moore's law, whether one can devise very small transistors based on only one atomic layer, using new methods of making materials,’ Bernholc says. ‘We are looking at potential transistor structures consisting of a single layer of graphene, etched into lines of nanoribbons, where the carbon atoms are arranged like a chicken wire pattern. We are looking at which structures will function well, at a few atoms of width.’

One of the challenges with creating transistors of this size is potential quantum effects such as quantum tunnelling that can cause electrons to behave unconventionally, flowing between transistors and logic gates.   

‘We are doing quantum mechanical computations with thousands of atoms, and several thousands of electrons, and that requires very fast, very powerful systems, and we need to do calculations in parallel’ Bernholc says. ‘On Blue Waters, we use thousands of nodes in parallel, so we can complete quantum mechanical calculations in a time that's practical and receive results in a timely fashion.’

The use of graphene as a potential material for transistors is being researched by a number of universities in different projects which are hoping to drive transistor technology past the 10nm barrier. More information about these projects can be found in Adrian Giordani’s article on the subject from last year.

More details on Bernholc’s research, which is also exploring the use of graphene in DNA sequencing, can be found on the NCSA website.

Twitter icon
Google icon icon
Digg icon
LinkedIn icon
Reddit icon
e-mail icon

Robert Roe reports on developments in AI that are helping to shape the future of high performance computing technology at the International Supercomputing Conference


James Reinders is a parallel programming and HPC expert with more than 27 years’ experience working for Intel until his retirement in 2017. In this article Reinders gives his take on the use of roofline estimation as a tool for code optimisation in HPC


Sophia Ktori concludes her two-part series exploring the use of laboratory informatics software in regulated industries.


As storage technology adapts to changing HPC workloads, Robert Roe looks at the technologies that could help to enhance performance and accessibility of
storage in HPC


By using simulation software, road bike manufacturers can deliver higher performance products in less time and at a lower cost than previously achievable, as Keely Portway discovers