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German startup MachineWare announces a RISC-V simulator

MachineWare aims to disrupt semiconductor design with the introduction of its high-speed functional simulator, SIM-V.

Headquartered in Aachen and emerging from stealth mode in May, MachineWare’s SIM-V combines simulation performance with customisability for applications ranging from embedded devices to supercomputers. SIM-V enables software developers to test full software stacks – including firmware, operating system kernel and complex user-space applications, such as (Java-) virtual machines or rich graphical environments – in real-time.

Lukas Jünger, MachineWare managing director and co-founder: ‘Our mission is to equip RISC-V software developers with the tools they need to deliver safe and secure software stacks on schedule and glitch free.’

Today’s hardware-software systems are becoming increasingly complex, with even tiny edge systems executing millions of lines of code. SIM-V gives software developers the ability to interactively debug even the most complex designs without the need for physical hardware, even before first prototypes are available. Integrating SIM-V into continuous integration systems minimises test execution times, saves compute resources and allows developers to continue their work sooner.

‘Human errors are unavoidable and critical bugs that compromise system safety and security are bound to appear in every project,’ adds Lukas. ‘Correct system functionality can only be ensured through extensive testing and rigorous verification. However, automated, cross-architecture continuous-integration systems are still a major resource drain on many software teams. With SIM-V, complex test suites can be set up, executed much faster and scaled up, all before getting near the hardware.’

MachineWare offers tailored versions of SIM-V for different use cases SIM-V Compute targets the design and verification of high-performance RISC-V systems, including hardware models of GPUs and high-speed PCIe interconnects. SIM-V Edge, on the other end of the spectrum, is optimised for designing compact 32-bit edge computing systems, offering a broad range of I/O from the microcontroller design space.

Both simulators are built on MachineWare’s open-source SystemC modelling library, VCML, which enables easy integration into existing verification setups and SystemC platform models, while providing tracing, analysis and scripting features.

SIM-V is also based on MachineWare’s fast and flexible instruction set simulation framework FTL. This enables easy customisation of the simulator to add custom tailored RISC-V instruction set extensions or even design fully custom instruction set simulators for almost any microprocessor architecture.

MachineWare is a spinoff of RWTH Aachen’s Institute for Communication Technologies and Embedded Systems. The university has nurtured a culture of innovation, with 101  spinoffs in 2021 alone.



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Modelling & simulation, HPC

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