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BSC and Intel look towards potential future technologies

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The Barcelona Supercomputing Center (BSC) and Intel have renewed their collaborative research agreement at the Intel and BSC Exascale Laboratory until September 2017.

The Intel and BSC Exascale Lab, located at the BSC, focuses on software and the extraordinary levels of parallelism which will be needed to use future exascale supercomputers. The Intel and BSC Exascale Lab is a member of Intel’s European research network - Intel Labs Europe.

The work at the exascale lab will focus on developing tools for the analysis and prediction of systems behavior on real applications. Primarily this will involve the HPC performance tools Paraver and Dimemas, and the prediction methodologies developed at the Barcelona Supercomputing Center, which are being evaluated for use on new Intel-based hardware architectures.

In the area of programming, one of the objectives that the BSC and Intel have adopted is to use the BSC parallel Python development (PyCOMPs) to improve the efficiency of Big Data applications.

In the new phase of the collaboration, the Intel and BSC Exascale Lab will continue to work with BSC programming models within a single node, with an emphasis on their application on Intel Xeon Phi processor based architectures as well as in field-programmable gate array (FPGA) architectures.

‘We appreciate the excellent collaboration with BSC’, said Karl Solchenbach, European director of Intel’s Innovation, Pathfinding and Architecture Group. ‘BSC tools help to analyse and understand data center system behavior and to achieve higher scalability on node and system level.’

This is not the first time Intel have shown interest  in using FPGAs but this does demonstrate that they are at least exploring use of the technology for HPC applications. If Intel was to embrace FPGAs that would certainly go a long way to encouraging adoption of the technology.

In November of last year Intel announced that it was producing a SerDes (Serialiser/Deserialiser) from its custom foundry that would be used in Acronix FPGA’s, one application of these FPGAs is as coprocessors for HPC applications.

Robert Blake, CEO of Achronix said: ‘The SerDes from Intel Custom Foundry is a key differentiating technology for the growing range of high-speed interfaces that our FPGAs require.’

Intel also extended its Manufacturing partnership with Altera last year to include the development of Multi-Die devices. The collaboration is an extension of the foundry relationship between Altera and Intel, in which Intel is manufacturing Altera's Stratix 10 FPGAs and SoCs using the 14nm Tri-Gate processes.

Altera's work with Intel will enable the development of multi-die devices that efficiently integrate monolithic 14nm Stratix 10 FPGAs and SoCs with other advanced components, which may include DRAM, SRAM, ASICs, processors and analogue components, in a single package.

Intel have also released a Xeon E5-FPGA hybrid chip, although this is aimed at specific datacentre operations ans should not be seen as a potential product for the HPC market.

Speculative research into FPGAs aside the research into exascale HPC will be crucial for the next generation of HPC systems not only in Europe but across the whole HPC industry.  

Jesús Labarta, Director of the Computer Sciences Department at BSC certainly sees value in the continued relationship with Intel. He said: ‘We are really enjoying the dynamic and cooperative interaction with Intel teams that helps promote and improve our R&D activities.’