13 December 2012
Convey Computer has introduced a new computer architecture that, it says, directly addresses the computing needs of high-performance analytics applications. The MX series can run tens of thousands of threads of execution coupled with a smart memory system that can perform ‘in-memory’ arithmetic operations. Designed to scale up to 32 terabytes of physical memory, the MX series can exploit massive parallelism while efficiently handling hard-to-partition algorithms. Further features include a new suite of compilers and tools built on OpenMP, and a runtime thread library that takes advantage of hardware-based scheduling, avoiding the scaling bottlenecks typical of traditional thread-scheduling mechanisms.