RESEARCH NEWS

Biological computing models move closer?

12 August 2014



IBM has produced a chip that works more like a biological brain than a conventional microprocessor. Robert Roe reports on what could be a paradigm shift in computing

Scientists from IBM have unveiled the first neurosynaptic computer chip to achieve one million programmable neurons, 256 million programmable synapses, and 46 billion synaptic operations per second per watt.

IBM has developed the chip as a result of SyNAPSE, a DARPA-funded programme to develop electronic neuromorphic machine technology that scales to biological levels. DARPA is the US Government’s Defense Advanced Research Projects Agency.

The project at IBM started in 2008 and is led by Dr Dharmendra Modha, manager of IBM’s cognitive computing initiative. It involves five leading US universities (Stanford, Wisconsin-Madison, Cornell, Columbia University Medical Center, and California-Merced). The researchers are collaborating to create computing systems to simulate and emulate the brain’s abilities for sensation, perception, action, interaction and cognition, while rivalling its low power consumption and compact size.

‘After years of collaboration with IBM, we are now a step closer to building a computer similar to our brain,’ said Professor Rajit Manohar, Cornell Tech. The team has set itself the task of creating an entirely new neuroscience-inspired scalable and efficient computer architecture. It differs from the von Neumann architecture which has been used almost universally since its creation in the 1940s.

In an article written for IBM Research, Dharmendra Modha explained the need for a new computer architecture: ‘Today’s microprocessors are eight orders of magnitude faster (in terms of clock rate) and four orders of magnitude hotter (in terms of power per unit cortical area) than the brain.’

Overall energy consumption highlights the divergence between today’s computers and the brain. Dharmendra Modha said: ‘A “human-scale” simulation with 100 trillion synapses (with relatively simple models of neurons and synapses) required 96 Blue Gene/Q racks of the US Lawrence Livermore National Lab Sequoia supercomputer—and, yet, the simulation ran more than 1,500 times slower than real-time. A hypothetical computer to run this simulation in real-time would require 12GW, whereas the human brain consumes merely 20W.’

More details on this simulation can be found in a paper written by a team of scientists from IBM research and the Lawrence Livermore National Labs simply entitled ‘1014’. It details the achievements of the Synapse project in scaling the architecture up to 1.37x1014 synapses.

The paper states: ‘It is important to clarify that we have not built a biologically realistic simulation of the complete human brain. Rather, we have simulated a novel modular, scalable, non-von Neumann, ultra-low power, cognitive computing architecture at the DARPA SyNAPSE metric of 1014 synapses that itself is inspired by the number of synapses in the human brain.’

The team used a software package called Compass to simulate the brain-inspired architecture, designated TrueNorth. It enables testing of the architecture on a mainstream supercomputer before being built directly in specialised neuromorphic hardware. Compass is also a parallel compiler that can map a network of long-distance neural pathways in the macaque monkey brain to TrueNorth.

The team used Compass to develop an understanding of the scalability of their neurosynaptic architecture. Intriguingly this was accomplished on a Von-Neuman architecture based cluster – because no large scale systems for neurosynaptic computing have been developed, an obvious yet novel challenge for researchers developing new system architectures such as TrueNorth.

‘We completed a new experimental evaluation of Compass that simulated up to an unprecedented 2.08 billion neurosynaptic cores and showed near-perfect weak and excellent strong scaling behaviour when simulating a CoCoMac (Collations of Connectivity data on the Macaque brain – an approach to produce a systematic record of the known wiring of the primate brain) macaque network model on the Sequoia Blue Gene/Q.’

Dharmendra Modha said: ‘Unlike today’s inorganic silicon technology, the brain uses biophysical, biochemical, organic wetware. While future enabling nanotechnology is underway, we [IBM] focused on the second factor: architecture innovation—specifically, on minimising the product of power, area, and delay in a system that could be implemented in today’s state-of-the-art technology.’

In the article written for IBM research Modha explained that ‘the cerebral cortex is hypothesised to comprise repeating canonical cortical microcircuits.’ IBM used this hypothesis as a starting platform in 2011 when developing their ‘worm-scale’ neurosynaptic core that integrated computation and memory. Back in the present day, the team have increased the performance and scale of the microprocessor dramatically. Modha highlighted the improvements: ‘Now, we have shrunk the neurosynaptic core by 15-fold in area and 100-fold in power, and have tiled 4,096 cores via an on-chip network to create TrueNorth—with one million neurons and 256 million synapses’.

Modha also provided some clarification on the new architectures design. He said: ‘TrueNorth has a parallel, distributed, modular, scalable, fault-tolerant, flexible architecture that integrates computation, communication, and memory and has no clock.  It is fair to say that TrueNorth completely redefines what is now possible in the field of brain-inspired computers, in terms of size, architecture, efficiency, scalability, and chip design techniques.

More information can be found in two papers written in as part of the collaboration, the first, ‘A Digital Neurosynaptic Core Using Embedded Crossbar Memory with 45pJ per Spike in 45nm’ was written by IBM research- Almaden and Cornell University. It states: ‘We fabricated a key building block of modular neuromorphic architecture, a neurosynaptic core, with 256 digital integrate-and-fire neurons and a 1024 256 bit SRAM crossbar memory for synapses using IBM’s 45nm SOI process. The comparison with Von Neumann architecture followed: ‘In contrast to a conventional von Neumann architecture, our core tightly integrates computation (neurons) alongside memory (synapses), which allows us to implement efficient fan-out (communication) in a naturally parallel and event-driven manner, leading to ultra-low active power consumption of 45pJ/spike.’

The paper goes on to highlight some of the intricate design choices behind the move to a new architecture: ‘Traditionally, neuromorphic architectures have used analogue neurons to significantly reduce power consumption. However, the approach has two main drawbacks. First, there is limited correspondence between software (the neural algorithm) and hardware (the analogue implementation) due to the sensitivity of dense analogue circuits to process variations and to ambient temperatures.’

The solution for IBM and their team of researchers was to design an architecture that is ‘completely deterministic by design, and hence, functionally equivalent to software models’ the paper states. The paper also highlights the need to remove bottlenecks, whether between memory and processor or hardware and software. It states: ‘In particular, for any time step in the software simulation, the software activity in terms of spikes per neuron, neuron state, etc is identical to the equivalent property of the hardware. This is the first neuromorphic architecture to exhibit this strong correspondence property, breaking a key stalemate between hardware development and software development.’

The second major hurdle for the team was to remove or at least alleviate the challenges of scaling analogue neuromorphic systems, which prevent the neuromorphic architectures from operating at speeds relevant to the human brain, again this was something highlighted by the Blue Gene simulation.’ The paper states: ‘In particular, the lack of high-density capacitors in modern CMOS processes as well as increasing sub-threshold currents makes it difficult to implement neural circuits with biologically-relevant time constants.

To conclude the paper gives more detail on the difference between the new architecture and that of a Von-Neuman type system. The paper states: ‘Specifically, the von Neumann architecture separates memory and computation, and therefore requires high-bandwidth to communicate spikes to off-chip routing tables, leading to high power consumption. Furthermore, the parallel and event-driven computation of the brain does not map well to the sequential processing model of conventional computers.’

In contrast to this, IBM and their collaborators ‘implement “fanout”’ by integrating crossbar memory with neurons to keep data movement local, and use an asynchronous event-driven design where each circuit evaluates in parallel and without any clock, dissipating power only when absolutely necessary.’

The difficulties of simulating the interactions between neurons on a large scale were highlighted in 2009 when prominent neuroscientist Henry Markram, professor at the EPFL (École polytechnique fédérale de Lausanne) and director of both the Blue Brain Project and the Human Brain Project criticised an earlier IBM claim to have simulated neurosynaptic computing at the scale of a cat brain. In an open letter Makram said: ‘This is a mega public relations stunt. These simulations do not even come close to the complexity of an ant, let alone that of a cat.’

However the new chip, at 5.4 billion transistors, is a fully functional and production-scale chip and currently one of the largest CMOS chips ever built. While running at biological real time, it consumes a minuscule 70mW—orders of magnitude less power than a modern microprocessor.

The research still has a long way to go, not only have the team created a new programming language, and all of the headaches associated with its development, they still have to demonstrate that it can truly be scaled up to 1014 in a real environment, rather than simulating the potential to do so using a conventional supercomputer.