ANALYSIS & OPINION

A deep dive into transactional memory

16 February 2012

A deep dive into transactional memory


Transactional memory is a natural and obvious fit for future many-core products. Intel’s RTM is undeniably an easier programming model than many alternatives and can augment existing languages like C++ through libraries and extensions. Moreover, the potential to significantly improve scalability is incredibly attractive for a design with dozens of cores and hundreds of threads. For example, a presentation from Doug Carmean emphasized the challenge in handling contended locks in the early versions of Larrabee. TSX can potentially remove lock contention as an issue for the majority of programs, except where a true dependency exists and serialization is required for correctness. Overall, it would be surprising if the successor to Knight’s Corner did not support some version of TSX.

This article was originally published on insideHPC.com and appears here as part of a cross-publishing agreement.

Related internet links

insideHPC
David Kanter's analysis of transactional memory